Currently, in order to implement a thin and light display product, a Gate Driver on Array (GOA) technology, with which progressive (or line-by-line) scan drive of a display panel is achieved by integrating gate switching circuitry in an array substrate of the display panel, is typically used in designing a scan drive circuit of the display panel, in place of the existing design of a separated gate drive Integrated Circuit (IC). An amorphous silicon gate drive circuit on the array substrate is generally disposed on one or two sides of a display region and occupies a significant area of the frame region of the display panel. However, it is currently required to reduce the area of the frame region as much as possible in the dominant design of the display product.
As shown in FIG. 1 which is a schematic diagram showing an arrangement of various components of a gate drive circuit 1000, the gate drive circuit 1000 generally includes an ASG (a-Si Shift Register) Bus wire 111, an ASG capacitor 112 and an ASG Thin-Film Transistor (TFT) 113. In the related art, the ASG capacitor 112 includes two electrode plates, which are typically formed by a gate metal layer 112b and a source-drain metal layer 112a. However, the gate metal layer 112b and the source-drain metal layer 112a are usually made of opaque material, therefore, the ASG capacitor 112 is opaque and may affect a light transmittance of the frame of the display panel, so that in solidifying a seal agent applied to the frame through Ultraviolet (UV) light irradiation, the solidification of the seal agent will not be good enough because the ASG capacitor region is opaque. As shown in FIG. 2, in order to solve the above problems, the ASG capacitor 112 is hollowed out in the related art, i.e., elongated openings are formed in the gate metal layer 112b and the source-drain metal layer 112a, such that lights can pass through the ASG capacitor 112 and hence the light transmittance of the ASG capacitor 112 is increased. However, facing areas of the two electrode plates of the ASG capacitor 112 are required to be enlarged so as to ensure sufficient capacitance of the ASG capacitor 112, which results in that the area of the gate drive circuit 1000 is excessively occupied and it is difficult to implement a narrow frame. Alternatively, an Indium Tin Oxide (ITO) layer on the array substrate is configured to also function as the two electrode plates of the ASG capacitor, in this case, although the ITO layer is made of transparent conductive material so as to enhance the light transmittance of the display panel, the problem of poor solidification of the seal agent is still existing due to the presence of the ITO layer.